The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the semiconductor industry utilized various methods and structures to form semiconductor devices. Forming power devices usually presented a concern of the maximum power that could be dissipated by the semiconductor device. Typically, the power device was formed as a single fixed area of a semiconductor substrate. FIG. 1 schematically illustrates a general conception of a semiconductor device 200 that had a power device 202 on a semiconductor substrate 201. A top portion of FIG. 1 illustrates a plan view of device 200 while a bottom portion of FIG. 1 illustrates a cross-sectional view along section lines 1—1. Dashed lines illustrate heat that radiated from power device 202 through substrate 201. As can be seen, most of the heat was concentrated in a portion 204 of substrate 201. Portion 204 was referred to as a self-interacting region of heat. Such self-interacting regions of heat typically caused semiconductor device 200 to have a high thermal resistance and reduced the maximum power that device 200 could dissipate. In some cases, the high thermal resistance semiconductor devices required extra cooling to keep the temperature of the semiconductor die below a maximum allowable limit thereby increasing the cost of using the semiconductor device. Because of the high thermal resistance, the temperature of the semiconductor die often increased to a temperature which reduced the reliability and lifetime of the semiconductor device.
Accordingly, it is desirable to have a method that efficiently distributes heat within a semiconductor device, that does not reduce the packing density of the semiconductor device, and that lowers the thermal resistance of the semiconductor device.
For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions are generally not straight lines and the corners are not precise angles.